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The Best OCZ Core SATA SSD information

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Where is the map stored? What is the wear life of the mapping cells?

Read my post -- this was already explained. The mapping information goes in the cell that is being written. In simple terms, the block being written IS the mapping block -- its self-descriptive.

Ah right, I must have skimmed past that the first time 'round. I see, sorry, thanks for the explanation.

It begins to remind me of old mainframe disk extents...

So I did a bit more research.

Intel's next gen:

The claims of intel on their wear leveling algorithm and i/o per sec on random writes to me sound like they are converting all writes to linear writes and virtualizing the physical addresses completely. All SSD's virtualize, at minimum for basic wear leveling and bad block remapping, but going 'all the way' is becoming more common.

Wikipedia entries on flash related to the above:

Relevant quotes:

This effect is partially offset in some chip firmware or file system drivers by counting the writes and dynamically remapping blocks in order to spread write operations between sectors; this technique is called wear levelling. Another approach is to perform write verification and remapping to spare sectors in case of write failure, a technique called bad block management (BBM).
When a logical block is accessed by high-level software, it is mapped to a physical block by the device driver or controller. A number of blocks on the flash chip may be set aside for storing mapping tables to deal with bad blocks, or the system may simply check each block at power-up to create a bad block map in RAM. The overall memory capacity gradually shrinks as more blocks are marked as bad.
Most NAND devices are shipped from the factory with some bad blocks which are typically identified and marked according to a specified bad block marking strategy. By allowing some bad blocks, the manufacturers achieve far higher yields than would be possible if all blocks had to be verified good. This significantly reduces NAND flash costs and only slightly decreases the storage capacity of the parts.

And then there is this company, which I just found out about. They clearly are doing the "order random writes in sequence and remap" approach with middleware software. And selling it, and attempting to patent it. Although it doesn't seem very novel to me, ZFS and others have turned random writes into sequential ones in the past, applying that to this problem is more digging into an engineer's toolbox than coming up with a new idea.

Other things I found while researching today:

Include comments on the trends for the future and eventual use of "MFT" technology at the device level -- which is what it looks like Intel and FusionIo dogiven their very high random write performance.

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On 1/5/2020 at 6:19 PM, Slade said:

Seriously?  You necro a 11.5 year old thread to post a spam link to kitchenware?

I like the dedication, lol

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