[Cm364SMG]

My friend and I were talking today about the new Prescott processor from Intel that's supposed to come out in Q3/Q4 of this year, and I mentioned that it's going to have 1MB of Level 2 cache. The question he asked me was: "Why the heck don't they bother adding L1 cache instead?" Stunned at simply the thought of this, I just kinda stared at him trying to think of an answer. I knew there had to be some answer that a researcher deep within Intel had, but I just couldn't figure it out myself. Ever since the release of the Pentium 4, its L1 cache has remained at 16k.

On the other hand, its L2 cache has gone from 256k to 512k to 128k (Celeron) and now up to 1024k. If L1 cache is better, why don't they at least add on a few kilobytes? Is there a heat, cost, design, or performance issue that keeps Intel from beefin' up the L1 and adding only to the L2?

Just thought I'd ask...

[daiz]

the reason for this can be found in the technolog previews that abounded the internet just prior to and during the initial release of the Pentium 4. Due to the architecture i.e. long pipeline, trace cache, instruction handling etc. the L1 cache on the P4 chip will not be useful in the same way that it is on, say, an athlon chip. The Advanced Transfer Cache on the P4 can transfer data on every clock cycle (as opposed to the P3's every 2nd cycle), so i guess Intel could afford to reduce the L1 cache size because it was faster anyway.
the cost of producing such memory is also very high.
read some of the technology articles and you'll put 2 & 2 together

http://www.emulators...m_1.htm#Pentium 4
http://arstechnica.c.../caching-1.html
http://www.anandtech...doc.html?i=1360 - this is a good read